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    Searched refs:T2 (Results 1 - 17 of 17) sorted by null

  /netvirt/usr/src/common/openssl/crypto/md5/asm/
md5-sparcv9.S 48 #define T2 %o5
128 sethi %hi(0xd76aa478),T2
130 or T2,%lo(0xd76aa478),T2 !=
134 add T1,T2,T1 !=
136 sll A,7,T2
138 or A,T2,A !=
142 sethi %hi(0xe8c7b756),T2
144 or T2,%lo(0xe8c7b756),T2
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  /netvirt/usr/src/pkgdefs/SUNWn2cpact.v/
depend 45 P SUNWn2cp UltraSPARC-T2 Crypto Provider
  /netvirt/usr/src/pkgdefs/SUNWust2.v/
prototype_com 52 f none platform/sun4v/kernel/cpu/sparcv9/SUNW,UltraSPARC-T2 755 root sys
53 f none platform/sun4v/kernel/cpu/sparcv9/SUNW,UltraSPARC-T2+ 755 root sys
56 f none platform/sun4v/kernel/pcbe/sparcv9/pcbe.SUNW,UltraSPARC-T2 755 root sys
57 f none platform/sun4v/kernel/pcbe/sparcv9/pcbe.SUNW,UltraSPARC-T2+ 755 root sys
  /netvirt/usr/src/cmd/fm/dicts/
SUN4V.dict 45 fault.cpu.ultraSPARC-T2.ireg=15
46 fault.cpu.ultraSPARC-T2.freg=16
47 fault.cpu.ultraSPARC-T2.misc_reg=17
48 fault.cpu.ultraSPARC-T2.itlb=18
49 fault.cpu.ultraSPARC-T2.dtlb=19
50 fault.cpu.ultraSPARC-T2.icache=20
51 fault.cpu.ultraSPARC-T2.dcache=21
52 fault.cpu.ultraSPARC-T2.mau=22
53 fault.cpu.ultraSPARC-T2.l2data-c=23
54 fault.cpu.ultraSPARC-T2.l2cachetag=2
    [all...]
  /netvirt/usr/src/uts/sun4v/niagara2_pcbe/
Makefile 27 # This Makefile builds the UltraSPARC-T2 Performance Counter BackEnd (PCBE).
35 MODULE = pcbe.SUNW,UltraSPARC-T2
  /netvirt/usr/src/uts/sun4v/vfalls_pcbe/
Makefile 27 # This Makefile builds the UltraSPARC-T2+ Performance Counter BackEnd (PCBE).
35 MODULE = pcbe.SUNW,UltraSPARC-T2+
  /netvirt/usr/src/grub/grub-0.95/stage2/
zfs_sha256.c 74 uint32_t a, b, c, d, e, f, g, h, t, T1, T2, W[64];
88 T2 = SIGMA0(a) + Maj(a, b, c);
90 d = c; c = b; b = a; a = T1 + T2;
  /netvirt/usr/src/uts/common/fs/zfs/
sha256.c 78 uint32_t a, b, c, d, e, f, g, h, t, T1, T2, W[64];
92 T2 = SIGMA0(a) + Maj(a, b, c);
94 d = c; c = b; b = a; a = T1 + T2;
  /netvirt/usr/src/uts/sun4v/niagara2/
Makefile 28 # This makefile drives the production of the UltraSPARC-T2 cpu module.
41 MODULE = SUNW,UltraSPARC-T2
  /netvirt/usr/src/uts/sun4v/vfalls/
Makefile 28 # This makefile drives the production of the UltraSPARC-T2+ cpu module.
41 MODULE = SUNW,UltraSPARC-T2+
  /netvirt/usr/src/cmd/perl/5.6.1/distrib/lib/
Exporter.pm 71 %EXPORT_TAGS = (T1=>[qw(A1 A2 B1 B2)], T2=>[qw(A1 A2 B3 B4)], T3=>[qw(X3)]);
83 import Test qw(:T2 !B4);
84 import Test qw(:T2); # should fail
185 %EXPORT_TAGS = (T1 => [qw(A1 A2 B1 B2)], T2 => [qw(A1 A2 B3 B4)]);
192 use Module qw(:DEFAULT :T2 !B3 A3);
Benchmark.pm 158 =item timediff ( T1, T2 )
236 =item timesum ( T1, T2 )
  /netvirt/usr/src/common/openssl/crypto/sha/
sha256.c 160 unsigned MD32_REG_T a,b,c,d,e,f,g,h,s0,s1,T1,T2;
178 T2 = Sigma0(a) + Maj(a,b,c);
180 d = c; c = b; b = a; a = T1 + T2;
193 T2 = Sigma0(a) + Maj(a,b,c);
195 d = c; c = b; b = a; a = T1 + T2;
206 T2 = Sigma0(a) + Maj(a,b,c);
208 d = c; c = b; b = a; a = T1 + T2;
sha512.c 363 SHA_LONG64 a,b,c,d,e,f,g,h,s0,s1,T1,T2;
384 T2 = Sigma0(a) + Maj(a,b,c);
386 d = c; c = b; b = a; a = T1 + T2;
396 T2 = Sigma0(a) + Maj(a,b,c);
398 d = c; c = b; b = a; a = T1 + T2;
  /netvirt/usr/src/common/crypto/sha2/
sha2.c 93 T2 = BIGSIGMA0_256(a) + Maj(a, b, c); \
94 h = T1 + T2
104 T2 = BIGSIGMA0(a) + Maj(a, b, c); \
105 h = T1 + T2
159 uint32_t T1, T2;
369 uint64_t T1, T2;
  /netvirt/usr/src/cmd/perl/5.8.4/distrib/lib/
Benchmark.pm 166 =item timediff ( T1, T2 )
275 =item timesum ( T1, T2 )
  /netvirt/usr/src/cmd/hwdata/
pci.ids 405 4154 RV350 AT [Fire GL T2]
406 4155 RV350 AU [Fire GL T2]
407 4156 RV350 AV [Fire GL T2]
408 4157 RV350 AW [Fire GL T2]
690 4e54 M10 NT [FireGL Mobility T2]
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